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ESL-to-RTL synthesis for control-intensive IP design and verification.
Esterel Studio 
www.esterel-eda.com - 2009-02-09
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Intelligent DV: ASIC Design Verification done Intelligently
intelligentdv.com - 2009-02-13
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Advanced RTL-to-GDSII electronic design and physical verification software for SoCs, ASICs and structured ASICs, and FPGAs, with special capabilities for 90 ...
www.magma-da.co.jp - 2009-04-07
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SoC Design and Design Methodology.
www.swanonchips.com - 2009-04-02
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Virtual Magenetics Ingenieurbuero Richard Bernauer berechnet und entwickelt induktive Bauelemente, speziell Planartransformatoren
virtual-magnetics.de - 2009-02-07
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VHDL design examples for logic synthesis for FPGA, PLD and small ASIC design. Demonstrates design style for state machines, combinational logic, arithmetic, ...
1164 
www.vahana.com - 2009-02-04
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Synplicity, Inc. is a supplier of design automation solutions used by the world's leading electronic products companies to create and verify electronic products ...
www.synplicity.com - 2009-02-07
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Only Mentor Graphics has a fully integrated FPGA solution that gives you the power to handle today's cutting edge designs. Mentor Graphics works closely with ...
www.fpgapartner.com - 2009-02-12
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Barbay Consulting provides custom SoC development tools and services. The Single Point Source tool offers one file, an XML dialect, which describes an SoC ...
Bit Fields  Read Write Testing  Register Testing  System 'C' 
www.barbayconsult.com - 2009-04-04
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RTL Design Services
16-bit parallel scrambler  16-bit scrambler  8b10b  dll layer  guts logic  gutzlogic  gutz logic  plx8111  plx8114 
www.gutzlogic.com - 2009-02-08
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